FIG. 1 is a schematic block diagram indicating the main functional components of a wideband code division multiple access (WCDMA) receiver. Reference numeral 2 denotes an antenna which receives a wireless transmission and supplies it in analog form to RF and IF stages 4. A receiver front end 6 includes the functions of analog to digital conversion and supplies digital samples to a signal detection block 8. The signal detection block 8 can be implemented in a number of ways and is responsible for de-scrambling and de-spreading the received coded signal samples. For each time slot a block is received which comprises a plurality of transport channels (TrCH) multiplexed onto a WCDMA dedicated physical channel (DPCH). As shown in FIG. 1, after signal detection and channel decoding the decoded data bits are supplied to a Cyclic Redundancy Check (CRC) block 12. The CRC check indicates whether or not the data block has been correctly decoded.
For interference-limited wireless systems, such as those based on CDMA technology, link adaptation is performed by a Transmit Power Control (TPC) mechanism, which ensures that sufficient but not excessive power is transmitted to achieve an adequate received signal quality. In a 3GPP WCDMA system, the power control mechanism comprises two parts: 1) a so-called “outer-loop” algorithm 14 that sets and adjusts a target signal-to-interference power ratio (SIR) in order to meet a Block Error Rate (BLER) target set by a network; and 2) a so-called “inner-loop” algorithm 16 that provides fast feedback to the transmitter in order that the transmitter can adjust its transmitted signal power so that the receiver SIR target is met. The inner-loop transmit power control 16 is typically based on the comparison between a target SIR (SIRtarget) and an SIR estimated from the received signal (SIRest). The outer-loop mechanism 14 increases or decreases the SIR target in response to the receipt of block error information, which is typically derived by the pass/fail of the CRC check 12. If a data block is received correctly (CRC pass) then the SIR target is decreased; if a data block is received incorrectly (CRC fail) then the SIR target is increased. In a typical implementation, the amount the SIR target is decreased following a correctly decoded block is equal to some step size (in dB) multiplied by the target block error rate, and the amount the SIR target is increased following an incorrectly decoded block is equal to the step size multiplied by one minus the target block error rate. For example, for a 10% BLER target and a 1 dB step size, the SIR target will be decreased by 1*0.1=0.1 dB following a good block and increased by 1*(1−0.1)=0.9 dB following a bad block. This has the effect that, for typical BLER targets, many more good blocks are required to lower the target than bad blocks to raise it by the same amount. In normal circumstances, the inner-loop power control is able to adjust the transmitted power to meet the new target in a short period (in WCDMA the power can be changed by 1 dB per slot). However, under certain conditions, such as when the transmitter has reached its maximum allowed transmit power, it may be the case that the SIR achieved at the receiver is lower than the target SIR for an extended period of time such that multiple data blocks are received while the condition pertains. In those conditions bad (CRC failed) blocks are likely, and the effect of them is to further raise the SIR target progressively higher with respect to the achieved SIR, for no benefit. When conditions return to normal following such a period (e.g., because the receiver has moved closer to the transmitter), the SIR target will be excessively high and the inner-loop will adjust the transmit power so that it is higher than necessary to achieve the desired BLER. To avoid such situations a so called “anti-windup” mechanism may be employed to limit how high the SIR target may rise above the measured achieved SIR. Following an SIR target increase (CRC fail), the anti-windup algorithm inhibits a further SIR target increase until the measured SIR has tracked the target variation. Performance requirements for such a mechanism in the User Equipment (UE) receiver are specified in 3GPP TS 25.101, “Technical Specification Group Radio Access Network: User Equipment (UE) radio transmission and reception (FDD)”, June 2004, Section 8.8.3.
On a 3GPP WCDMA downlink Dedicated Physical Channel (DPCH), Transport Format Combination Indicator (TFCI) bits (3GPP TS 25.211, “Technical Specification Group Radio Access Network: Physical Channels and Mapping of Transport Channels onto Physical Channels (FDD)”, December 2005, Section 5.3.2) are transmitted to indicate to the UE receiver which element of a finite, pre-defined Transport Format Combination Set (TFCS) is employed on the current frame. The Transport Format Combination (TFC) provides information on the number of transport blocks, their size, origin (transport channel), coding scheme, rate matching attributes, etc. for the UE to use in decoding the received data. For high spreading factor (i.e. low bandwidth) DPCHs, the number of TFCI bits may be a significant proportion of the whole transmitted DPCH slot. For instance, for Slot Format 3 (ibid., Table 11) there are 2 TFCI bits per slot out of only 20 bits, corresponding to a 10% overhead. Under certain circumstances (3GPP TS 25.211, “Technical Specification Group Radio Access Network: Multiplexing and channel coding (FDD)”, June 2006, Sections 4.3.1 and 4.3.1a) it is permissible to omit the TFCI bits to save bandwidth, in which case the UE is required to infer which TFC was used by performing some processing of the received data. This process is known as Blind Transport Format Detection (BTFD). A special case of BTFD is single transport format detection, in which there are only two possible transport formats per Transport Channel (TrCH): either no data or a single block of data (with CRC attached). Although the 3GPP standard specifies a BTFD performance test (3GPP TS 25.101, “Technical Specification Group Radio Access Network: User Equipment (UE) radio transmission and reception (FDD)”, June 2004, Section 8.10) which requires that false detections (i.e., events where the wrong TFC is identified) should occur at a rate lower than 10−4, the test does not apply to single format detection so there is no requirement that the false alarm rate be low in that case. Indeed, under certain channel conditions it may be a necessary compromise to have a non-negligible false alarm rate in order to achieve an acceptable detection rate.
Single format BTFD false alarms pose a significant problem to the correct functioning of outer-loop power control. It is common in real-world scenarios to find large periods of time where no data is transmitted on a particular TrCH (e.g., on a TrCH used only for signaling data). In such conditions, a succession of false alarms, which appear as blocks of data with bad CRCs, cause the SIR target to increase monotonically, until blocked by the anti-windup mechanism, as there are no good blocks received on that TrCH to lower the target. Even when the anti-windup mechanism stops the target SIR from rising, the transmitted power may be higher than necessary. This result has a negative effect on cell performance and may lead to the offending UE having its call dropped by a Radio Resource Management (RRM) algorithm at the base station transmitter or Radio Network Controller (RNC).